Verity - A formal verification program for custom

In an effort to fully exploit CMOS performance, custom design techniques are used extensively in commercial microprocessor design. However, given the complexity of current-generation processors and the necessity for manual designer intervention throughout the design process, proving design correctness is a major concern. In this paper we discuss Verity, a formal verification program for symbolically provtng the equivalence between a high-level design specification and a MOS transistor-level implementation. Verity applies efficient logic comparison techniques which implicitly exercise the behavior for all possible input patterns. For a given register-transfer level (RTL) system model, which is commonly used in present-day methodologies, Verity validates the transistor implementation with respect to functional simulation and verification performed at the RTL level. Introduction The design of complex digital systems requires verifying the correctness of the implementation with respect to the intended function. For example, large computer designs integrating many individual circuit components must be checked for numerous characteristics including static function, timing, testability, and manufacturability. A complete verification strategy is not only important for lower development cost and shorter design duration, it is a prerequisite for successful system design. A verification technique proves a set of user-defined design properties in terms of specific modeling criteria. The accuracy of the model and the complexity of the algorithms determine the practical limitations of a given technique. Typically, the trade-off between accurate results and efficient usage leads to a range of different verification methods applied at different levels of abstraction. Techniques for verifying detailed models of smaller circuit pieces are complemented by more abstract methods working on a larger scale. This hierarchical approach is especially important for practical usage of verification